1. Field of the Invention
The present invention relates to a low-temperature calcined ceramic which can be simultaneously molded with a metallized wiring layer by a metal such as Cu, Ag, etc, and more specifically to a low-temperature calcined ceramic the abrupt change of the thermal expansion of which is restrained. The present invention also relates to a wiring boad using the above-described low-temperature calcined ceramic and a mounted structure of a package for accommodating a semiconductor.
2. Description of the Prior Art
A wiring board, in general, has a structure in which a metallized wiring layer is arranged on the surface of, or in the inside of, an insulating board. A representative example of the wiring board will be a package for accommodating semiconductor elements and, particularly, a package for accommodating semiconductor integrated circuit elements such as LSIs (large-scale integrated circuit elements). In such a package, in general, recessed portions for accommodating semiconductor elements are formed in the surface of the insulating board composed of alumina ceramics, and a plurality of metallized wiring layers composed of a powder of a high-melting metal such as tungsten, molybdenum, etc. are arranged on the surface and inside the insulating board, and are electrically connected to the semiconductor elements accommodated in the recessed portions. On the lower surface or on the side surfaces of the insulating board are further provided connection terminals for electric connection to the mother board, the connection terminals being electrically connected to the metallized wiring layers. That is, the package for accommodating semiconductor elements is mounted upon electrically connecting the connection terminals, by brazing using a solder or the like, to the wiring conductors formed on the surface of the mother board.
Here, the number of electrodes formed on the semiconductor element increases with an increase in the degree of integration of the semiconductor element and, hence, the number of connection terminals provided on the package increases, too. Furthermore, the size of the package must be increased with an increase in the number of the electrodes. To meet the requirement for decreasing the size of the packages, however, it is also necessary to increase the number of the connection terminals per a package (i.e., to increase the density of the connection terminals).
Most generally, the connection terminals of the conventional packages for accommodating semiconductor elements are in the form of a pin grid array (PGA) in which metal pins such as of Kovar are connected to the lower surfaces of the packages. Furthermore, the surface mounting-type packages include a quad flat package (QFP) in which an L-shaped metal member is brazed to the metallized wiring layer drawn onto the side surface of the package, a leadless chip carrier (LCC) having electrode pads on the four side surfaces of the package but without having lead pins, and a ball grid array (BGA) in which spherical terminals composed of a brazing material such as solder are provided on the lower surface of the insulating board. Among them, it has been said that the BGA enables the connection terminals to be formed most highly densely.
In the BGA, the spherical terminals are brazed to the connection pads, and are placed on, and are contacted to, the wiring conductors of the mother board. In this state, the spherical terminals are heated and melted at a temperature of about 250.degree. to 400.degree. C. and are joined to the wiring conductors, so that the BGA is mounted on the mother board. Owing to such a mounting structure, the electrodes of the semiconductor element contained in the package are electrically connected to the mother board via metallized wiring layers and the connection terminals.
The insulating boards used for the packages have heretofore been composed of ceramics such as alumina, mullite, etc. The ceramic insulating board has a strength which is as high as not smaller than 200 MPa and offers such an advantage that the metallized wiring layers can be formed in a multiplicity of layers.
However, a ceramics such as alumina, mullite, etc., have a disadvantage that because the calcination temperature thereof is high as 1500.degree. C. or higher, for the insulating substrate made up of such a ceramic, a metal which has a low conductor resistance and is relatively inexpensive, such as Cu, Ag, etc., cannot be used as the wiring layer.
Thus, various insulating materials composed of sintered materials such as glass, ceramics and the like, which can be calcined at a low temperature and can use a metal such as Cu, Ag and the like as a wiring layer, are proposed as described, for example, in JP-A-50-119814, JP-A-58-176651 (the term "JP-A" as used herein means an "unexamined published Japanese patent application"), JP-B-3-59029, and JP-B-3-37758 (the term "JP-B" as used herein means an "examined published Japanese patent application"), and these insulating materials are practically used.
Such insulating materials of the related arts are obtained by calcining mixtures of glass components and fillers at a low temperature and they have an advantage that the dielectric constant can be lowered as compared with alumina and the like. For example, when inexpensive SiO.sub.2 is used as the filler and a crystal of quarts, cristobalite or the like is incorporated in the sintered material, not only a cost down but also lowering of the dielectric constant can be realized. This is because the dielectric constant of these crystals is low as 5 or lower. Also, the thermal expansion coefficient of crystals of quarts, cristobalite or the like is large. Accordingly, by adjusting the amount of the filler, the thermal expansion coefficient of the sintered body can be controlled. For example, when the insulating substrate composed of such a sintered material is mounted on an external electric circuit substrate such as a PC board, etc., it becomes very profitable dissolving mismatching, etc., of the thermal expansion coefficient of both the substrates.
However, the thermal expansion curve of the sintered body containing crystals of quarts, cristobalite or the like has a variation point of rapidly increasing the thermal expansion coefficient at a temperature specific to each crystal. Accordingly, at the time of decreasing the temperature after firing, crack tends to occur in the sintered body. Also, when such a sintered body is used as an insulating substrate for various wiring substrates, abrupt thermal expansion occurs by the temperature change at the use and as the result, there are problems that inferior contact of circuits occurs and at mounting the insulating substrate on an external electric circuit substrate, etc., inferior connection, etc., occurs.